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19-0732; Rev 0; 2/07
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
General Description
The MAX8662/MAX8663 power-management ICs (PMICs) are efficient, compact devices suitable for smart cellular phones, PDAs, Internet appliances, and other portable devices. They integrate two synchronous buck regulators, a boost regulator driving two to seven white LEDs, four low-dropout linear regulators (LDOs), and a linear charger for a single-cell Li-ion (Li+) battery. Maxim's Smart Power SelectorTM (SPS) safely distributes power between an external power source (AC adapter, auto adapter, or USB source), battery, and the system load. When system load peaks exceed the external source capability, the battery supplies supplemental current. When system load requirements are small, residual power from the external power source charges the battery. A thermal-limiting circuit limits battery-charge rate and external power-source current to prevent overheating. The PMIC also allows the system to operate with no battery or a discharged battery. The MAX8662 is available in a 6mm x 6mm, 48-pin thin QFN package, while the MAX8663, without the LED driver, is available in a 5mm x 5mm, 40-pin thin QFN package.
Features
Two 95%-Efficient 1MHz Buck Regulators Main Regulator: 0.98V to VIN at 1200mA Core Regulator: 0.98V to VIN at 900mA 1MHz Boost WLED Driver Drives Up to 7 White LEDs at 30mA (max) PWM and Analog Dimming Control Four Low-Dropout Linear Regulators 1.7V to 5.5V Input Range 15A Quiescent Current Single-Cell Li+ Charger Adapter or USB Input Thermal-Overload Protection Smart Power Selector (SPS) AC Adapter/USB or Battery Source Charger-Current and System-Load Sharing
MAX8662/MAX8663
Ordering Information
PART MAX8662ETM+ MAX8663ETL+ TEMP RANGE -40C to +85C -40C to +85C PIN-PACKAGE PKG CODE
48 Thin QFN-EP* T4866-1 6mm x 6mm x 0.8mm 40 Thin QFN-EP* T4055-1 5mm x 5mm x 0.8mm
Applications
Smart Phones and PDAs MP3 and Portable Media Players Palmtop and Wireless Handhelds
+Denotes a lead-free package. *EP = Exposed paddle.
Pin Configurations
CC3 OVP PG2 PG1 EN2 PV2 PV1 EN1 LX2 FB2 LX1 CS
Typical Operating Circuit
DC/USB INPUT PWR OK DC POK CHG CEN EN1 EN2 EN3 (MAX8662 ONLY) EN4 EN5 EN6 OUT4 EN7 OUT4-OUT7 VOLTAGE SELECT SL1 SL2 OUT5 OUT6 OUT7 500mA 150mA 300mA 150mA CS LX2 LX3 SYS BAT TO SYSTEM POWER Li+ BATTERY OUT1 0.98V TO VIN / 1.2A OUT2 0.98V TO VIN / 0.9A TO SYS OUT3 30mA WLED
TOP VIEW
36 35 34 33 32 31 30 29 28 27 26 25 EN6 EN7 LX3 PG3 OUT6 IN67 OUT7 VL SL1 SL2 PSET POK 37 38 39 40 41 42 43 44 45 46 47 48 1 PEN1 2 PEN2 3 EN3 4 DC1 5 DC2 6 SYS1 7 SYS2 8 BAT1 9 BAT2 10 11 12 CHG CEN BRT 24 23 22 21 20 19 FB1 PWM EN5 EN4 OUT5 IN45 OUT4 GND REF CT ISET THM
CHARGE STATUS CHARGE ENABLE
MAX8662 MAX8663
LX1
MAX8662
18 17 16 15 14 13
THIN QFN (6mm x 6mm)
Pin Configurations continued at end of data sheet.
Smart Power Selector is a trademark of Maxim Integrated Products, Inc.
1
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
ABSOLUTE MAXIMUM RATINGS
LX3 to GND ............................................................-0.3V to +33V DC_ to GND..............................................................-0.3V to +9V BAT_ CEN, CHG, EN_, PEN_, POK, PV_, PWM, SYS_, LX1, CS, LX2 to GND .................................-0.3V to +6V VL to GND ................................................................-0.3V to +4V BRT, CC3, FB_, IN45, IN67, OVP, REF, SL_ to GND ...........................................-0.3V to (VSYS + 0.3V) CT, ISET, PSET, THM to GND .....................-0.3V to (VVL + 0.3V) OUT4, OUT5 to GND................................-0.3V to (VIN45 + 0.3V) OUT6, OUT7 to GND................................-0.3V to (VIN67 + 0.3V) PG_ to GND...........................................................-0.3V to +0.3V BAT1 + BAT2 Continuous Current ...........................................3A SYS1 + SYS2 Continuous Current (2 pins) ..............................3A LX_ Continuous Current ........................................................1.5A Continuous Power Dissipation (TA = +70C) 40-Pin 5mm x 5mm Thin QFN (derate 35.7mW/C above +70C) (multilayer board) .......................................................2857mW 48-Pin 6mm x 6mm Thin QFN (derate 37mW/C above +70C) (multilayer board)...2963mW Operating Temperature Range ..........................-40C to +85C Junction Temperature Range ............................-40C to +125C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS (Input Limiter and Battery Charger)
(VDC = 5V, VBAT = 4V, VCEN = 0V, VPEN_ = 5V, RPSET = 3k, RISET = 3.15k, CCT = 0.068F, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER INPUT LIMITER DC Operating Range DC Undervoltage Threshold DC Overvoltage Threshold DC Supply Current DC Shutdown Current DC-to-SYS Dropout On-Resistance DC-to-BAT Dropout Threshold VL Voltage SYS Regulation Voltage RDC_SYS VDR_DC_BAT VVL VSYS_REG VDC VDC_L VDC_H (Note 2) VDC rising, 500mV hysteresis VDC rising, 100mV hysteresis ISYS = IBAT = 0mA, VCEN = 0V ISYS = IBAT = 0mA, VCEN = 5V VDC = 5V, VCEN = 5V, VPEN1 = VPEN2 = 0V (USB suspend mode) VDC = 5V, ISYS = 400mA, VCEN = 5V When VSYS regulation and charging stops, VDC falling, 150mV hysteresis IVL = 0 to 10mA VDC = 5.8V, ISYS = 1mA, VCEN = 5V VPEN1 = 5V, VPEN2 = 5V, RPSET = 1.5k VPEN1 = 5V, VPEN2 = 5V, RPSET = 3k DC Input Current Limit IDC_LIM VDC = 5V, VSYS = 4.0V VPEN1 = 5V, VPEN2 = 5V, RPSET = 6k VPEN1 = 0V, VPEN2 = 5V (500mA USB mode) VPEN1 = VPEN2 = 0V (100mA USB mode) PSET Resistance Range Input Limiter Soft-Start Time RPSET Guaranteed by SYS current limit TSS_DC_SYS Current-limit ramp time 20 3.1 5.2 1800 900 450 450 80 1.5 1.5 4.1 3.9 6.6 4.0 6.9 1.5 0.9 110 0.1 50 3.3 5.3 2000 1000 500 475 90 180 0.2 85 3.5 5.4 2200 1100 550 500 100 6.0 k ms mA 8.0 4.1 7.2 V V V mA A mV V V SYMBOL CONDITIONS MIN TYP MAX UNITS
2
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
ELECTRICAL CHARACTERISTICS (Input Limiter and Battery Charger) (continued)
(VDC = 5V, VBAT = 4V, VCEN = 0V, VPEN_ = 5V, RPSET = 3k, RISET = 3.15k, CCT = 0.068F, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER BATTERY CHARGER BAT-to-SYS On-Resistance BAT-to-SYS Reverse Regulation Voltage BAT Regulation Voltage BAT Recharge Threshold BAT Fast-Charge Current VBAT_REG RBAT_REG VDC = 0V, VBAT = 4.2V, ISYS = 1A VDC = 5V, VPEN1 = VPEN2 = 0V (USB 100mA mode), ISYS = 200mA (BAT to SYS voltage drop during SYS overload) IBAT = 0mA TA = +25C TA = -40C to +85C RISET = 1.89k RISET = 3.15k RISET = 7.87k 675 50 4.179 4.158 -140 40 100 4.200 4.200 -100 1250 750 300 75 1.57 2 1.5 2.9 3.0 0.01 0.01 3.1 5 5 7.87 mA k V/A ms V A 825 mA 80 150 4.221 4.242 -60 m mV SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX8662/MAX8663
V mV
BAT voltage drop to restart charging ISYS = 0mA, RPSET = 1.5k, VPEN1 = VPEN2 = 5V
BAT Prequalification Current ISET Resistance Range VISET-to-IBAT Ratio Charger Soft-Start Time BAT Prequalification Threshold BAT Leakage Current tSS_CHG RISET
VBAT = 2.5V, RISET = 3.15k (prequalification current is 10% of fast-charge current) Guaranteed by BAT charging current (1.5A to 300mA) RISET = 3.15k (ISET output voltage to actual charge-current ratio) Charge-current ramp time VBAT rising, 180mV hysteresis VBAT = 4.2V, outputs disabled IBAT where CHG goes high, and top-off timer; IBAT falling (7.5% of fast-charge current) IBAT falling (Note 3) CCT = 0.068F tPREQUAL tFST-CHG tTOP-OFF From CEN high to end of prequalification charge, VBAT = 2.5V, CCT = 0.068F From CEN high to end of fast charge, CCT = 0.068F From CHG high to end of fast charge, CCT = 0.068F (Note 4) RPSET = 3k VDC = 0V VDC = VCEN = 5V
CHG and Top-Off Threshold
RISET = 3.15k
56.25
mA
Timer-Suspend Threshold Timer Accuracy Prequalification Time Charge Time Top-Off Time Charger Thermal-Limit Temperature Charger Thermal-Limit Gain
250 -20
300
350 +20
mV % Min Min Min C mA/C
30 300 30 100 50
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3
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
ELECTRICAL CHARACTERISTICS (Input Limiter and Battery Charger) (continued)
(VDC = 5V, VBAT = 4V, VCEN = 0V, VPEN_ = 5V, RPSET = 3k, RISET = 3.15k, CCT = 0.068F, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER THERMISTOR INPUT (THM) THM Internal Pullup Resistance THM Resistance Threshold, Hot THM Resistance Threshold, Cold THM Resistance Threshold, Disabled Input Logic-High Level Input Logic-Low Level Logic Input-Leakage Current Logic Output-Voltage Low Logic Output-High Leakage Current VLOGIC = 0V to 5.5V, TA = +25C VLOGIC = 5.5V, TA = +85C ISINK = 1mA VLOGIC = 5.5V TA = +25C TA = +85C -1 +0.001 0.01 10 0.001 0.01 100 1 Resistance falling (1% hysteresis) Resistance rising (1% hysteresis) Resistance falling 3.73 26.98 270 10 3.97 28.7 300 4.21 30.42 330 k k k SYMBOL CONDITIONS MIN TYP MAX UNITS
LOGIC I/O (POK, CHG, PEN_, EN_, PWM, CEN) 1.3 0.4 +1 V V A mV A
ELECTRICAL CHARACTERISTICS (Output Regulator)
(VSYS_ = VPV_ = VIN45 = VIN67 = 4.0V, VBRT = 1.25V, circuit of Figure 1, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER SYSTEM SYS Operating Range SYS Undervoltage Threshold VSYS VUVLO_SYS VSYS rising, 100mV hysteresis Extra supply current when at least one output is on OUT1 on, VPWM = 0V OUT2 on, VPWM = 0V SYS Bias Current Additional Regulator Supply Current OUT3 on Not including SYS bias current OUT4 on (current into IN45) OUT5 on (current into IN45) OUT6 on (current into IN67) OUT7 on (current in IN67) Internal Oscillator Frequency BUCK REGULATOR 1 Supply Current Output Voltage Range Maximum Output Current VOUT1 IOUT1 ISYS + IPV1, no load, not including SYS bias current VPWM = 0V VPWM = 5V 0.98 1200 16 2.9 3.30 35 A mA V mA PWM frequency of OUT1, OUT2, and OUT3 0.9 2.6 2.4 2.5 35 16 16 1 20 16 17 16 1.0 5.5 2.6 70 35 35 2 30 25 27 25 1.1 MHz A mA A V V SYMBOL CONDITIONS MIN TYP MAX UNITS
Guaranteed by FB accuracy
4
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
ELECTRICAL CHARACTERISTICS (Output Regulator) (continued)
(VSYS_ = VPV_ = VIN45 = VIN67 = 4.0V, VBRT = 1.25V, circuit of Figure 1, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER FB Regulation Accuracy FB1 Input Leakage Current pMOS On-Resistance nMOS On-Resistance pMOS Current Limit Skip Mode Transition Current nMOS Zero-Cross Current LX Leakage BUCK REGULATOR 2 Supply Current Output Voltage Range Maximum Output Current FB Regulation Accuracy FB2 Input Leakage Current pMOS On-Resistance nMOS On- Resistance pMOS Current Limit Skip Mode Transition Current nMOS Zero-Cross Current LX Leakage BOOST REGULATOR FOR LED DRIVER Supply Current Output Range Minimum Duty Cycle Maximum Duty Cycle CS Regulation Voltage OVP Regulation Voltage OVP Sink Current OVP Soft-Start Period Time for IOVP to ramp from 0 to 20A VOUT3 DMIN DMAX VCS Duty = 90%, ILX3 = 0mA 90 0.29 1.225 19.2 At SYS, no load, not including SYS bias current Switching VSYS 10 92 0.32 1.250 20.0 1.25 0.35 1.275 20.8 1 30 mA V % % V V A ms VEN2 = 0V, VSYS = 5.5V, TA = +25C VLX2 = VPV2 = 5.5V VLX2 = 0V, VPV2 = 5.5V -5.00 ILX2 = 100mA ILX2 = 100mA VPV2 = 3.3V VPV2 = 2.6V VPV2 = 3.3V VPV2 = 2.6V 1.07 From VFB2 = 0.98V, IOUT2 = 0 to 600mA, VOUT2 = 0.98V to 3.3V ISYS + IPV2, no load, not including SYS bias current Guaranteed by FB accuracy VPWM = 0V VPWM = 5V 0.98 900 -3 0.01 0.2 0.3 0.2 0.3 1.30 90 25 0.01 -0.01 1.00 1.55 0.4 +3 0.10 0.4 16 2.1 3.30 35 A mA V mA % A A mA mA A VEN1 = 0V, VSYS = 5.5V, TA = +25C VLX1 = VPV1 = 5.5V VLX1 = 0V, VPV1 = 5.5V -5.00 ILX1 = 100mA ILX1 = 100mA VPV1 = 3.3V VPV1 = 2.6V VPV1 = 3.3V VPV1 = 2.6V 1.4 SYMBOL CONDITIONS From VFB1 = 0.98V, IOUT1 = 0 to 1200mA, VOUT1 = 0.98V to 3.3V MIN -3 0.01 0.12 0.15 0.2 0.3 1.8 90 25 0.01 -0.01 1.00 2.2 0.4 TYP MAX +3 0.10 0.24 UNITS % A A mA mA A
MAX8662/MAX8663
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5
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
ELECTRICAL CHARACTERISTICS (Output Regulator) (continued)
(VSYS_ = VPV_ = VIN45 = VIN67 = 4.0V, VBRT = 1.25V, circuit of Figure 1, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER OVP Leakage Current nMOS On-Resistance nMOS Off-Leakage Current nMOS Current Limit LED DRIVER BRT Input Range REF Voltage BRT Input Current CS Sink Current CS Current-Source Line Regulation PWM DIMMING EN3 DC Turn-On Delay EN3 Shutdown Delay PWM Dimming Capture Period PWM Dimming Pulse-Width Resolution LINEAR REGULATORS IN45, IN67 Operating Range IN45, IN67 Undervoltage Threshold Output Noise PSRR Shutdown Supply Current Soft-Start Ramp Time Output Discharge Resistance in Shutdown LINEAR REGULATOR 4 (LDO4) Supply Current Voltage Accuracy Minimum Output Capacitor Dropout Resistance Current Limit COUT4 At IN45, VEN5 = 0V IOUT4 = 0A -1.5 3.76 0.2 500 700 0.4 20 30 +1.5 A % F mA IOUT4 = 0 to 500mA, VIN45 = VOUT4 + 0.3V to 5.5V with 1.7V (min) Guaranteed stability, ESR < 0.05 IN45 to OUT4 VOUT4 = 0V VIN45 VUVLO-IN45 VIN45 rising, 100mV hysteresis f = 100Hz to 100kHz f = 100kHz VEN4 = VEN5 = 0V, TA = +25C VOUT4 to 90% of final value VEN4 = 0V 0.5 1.7 1.5 1.6 200 30 0.001 10 1.0 2.0 1 5.5 1.7 V V VRMS dB A V/ms k From VEN3 = high to LED on From VEN3 = low to LED off Time between rising edges on EN3 for PWM dimming to become active Maximum Minimum 1.5 1.5 1.5 2.0 2.0 2.0 8 0.5 10 2.5 2.5 ms ms ms s s VBRT VREF ICS = 0 to 30mA IREF = 0mA VBRT = 0 to 1.5V VCS = 0.2V VSYS = 2.7V to 5.5V TA = +25C TA = +85C VBRT = 1.5V VBRT = 50mV 28 0.4 0 1.45 -1 1.50 -0.01 0.1 30 0.8 0.1 32 1.2 1.5 1.55 +1 V V A mA %/V SYMBOL CONDITIONS VEN3 = 0V, VOVP = VSYS = 5.5V ILX3 = 100mA VLX3 = 30V TA = +25C TA = +85C 500 TA = +25C TA = +85C MIN TYP 0.01 0.1 0.6 0.01 0.1 620 900 1.2 5.00 MAX 1 UNITS A A mA
Resolution of high or low-pulse width on EN3 for dimming change
6
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
ELECTRICAL CHARACTERISTICS (OUTPUT REGULATOR) (continued)
(VSYS_ = VPV_ = VIN45 = VIN67 = 4.0V, VBRT = 1.25V, circuit of Figure 1, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER Supply Current Voltage Accuracy Minimum Output Capacitor Dropout Resistance Current Limit LINEAR REGULATOR 6 (LDO6) Supply Current Voltage Accuracy Minimum Output Capacitor Dropout Resistance Current Limit LINEAR REGULATOR 7 (LDO7) Supply Current Voltage Accuracy Minimum Output Capacitor Dropout Resistance Current Limit THERMAL SHUTDOWN Thermal-Shutdown Temperature Thermal-Shutdown Hysteresis TJ rising 165 15 C C COUT7 At IN67, VEN6 = 0V, VEN7 = VSYS IOUT7 = 0A -1.5 0.8 0.6 150 210 1.2 16 25 +1.5 A % F mA IOUT7 = 0 to 150mA, VIN67 = VOUT7 + 0.3V to 5.5V with 1.7V (min) Guaranteed stability, ESR < 0.05 IN67 to OUT6 VOUT7 = 0V COUT6 At IN67, VEN6 = VSYS, VEN7 = 0V Guaranteed stability, ESR < 0.05 IN67 to OUT6 VOUT6 = 0V 300 IOUT6 = 0A -1.5 1.76 0.35 420 0.60 17 27 +1.5 A % F mA IOUT6 = 0 to 300mA, VIN67 = VOUT6 + 0.3V to 5.5V COUT5 SYMBOL At IN45, VEN4 = 0V CONDITIONS IOUT5 = 0A -1.5 0.8 0.6 150 210 1.2 MIN TYP 16 MAX 25 +1.5 UNITS A % F mA LINEAR REGULATOR 5 (LDO5) IOUT5 = 0 to 150mA, VIN45 = VOUT5 + 0.3V to 5.5V with 1.7V (min) Guaranteed stability, ESR < 0.05 IN45 to OUT5 VOUT5 = 0V
MAX8662/MAX8663
Note 1: Limits are 100% production tested at TA = +25C. Limits over the operating temperature range are guaranteed through correlation using statistical quality control (SQC) methods. Note 2: Input withstand voltage. Not designed to operate above VDC = 6.5V due to thermal-dissipation issues. Note 3: ISET voltage when CT timer stops. Occurs only when in constant-current mode. Translates to 20% of fast-charge current. Note 4: Temperature at which the input current limit begins to reduce.
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7
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Typical Operating Characteristics
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5k, RISET = 3k, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 = VPEN2 = 5V, COUT1 = 2 x 10F, COUT2 = 2 x 10F, COUT3 = 0.1F, COUT4 = 4.7F, COUT5 = 1F, COUT6 = 2.2F, COUT7 = 1F, CT = 0.068F, CREF = CVL = 0.1F, RTHM = 10k, L1 = 3.3H, L2 = 4.7H, L3 = 22H, GND = PG1 = PG2 = PG3 = 0, TA = +25C, unless otherwise noted.)
INPUT QUIESCENT CURRENT vs. INPUT VOLTAGE (CHARGER ENABLED)
MAX8662/63 toc01
INPUT QUIESCENT CURRENT vs. INPUT VOLTAGE (CHARGER DISABLED)
MAX8662/63 toc02
INPUT QUIESCENT CURRENT vs. INPUT VOLTAGE (SUSPEND)
0.18 INPUT QUIESCENT CURRENT (mA) 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 VBAT = 4.2V ISYS = 0mA PEN1 = PEN2 = 0 CEN = 1
MAX8662/63 toc03
1.4 INPUT QUIESCENT CURRENT (mA) 1.2 1.0 0.8 0.6 0.4 0.2 0 0
INPUT QUIESCENT CURRENT (mA)
VBAT = 4.2V ISYS = 0 CHARGER IN DONE MODE VBAT RISING VBAT FALLING
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0
VBAT = 3.6V VBAT RISING VBAT FALLING
0.20
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
BATTERY-LEAKAGE CURRENT vs. BATTERY VOLTAGE
MAX8662/63 toc04
BATTERY-LEAKAGE CURRENT vs. TEMPERATURE (INPUT DISCONNECTED)
BATTERY-REGULATION VOLTAGE (V) VBAT = 4.0V EN_ = 0 0.7 0.6 0.5 0.4 0.3 0.2
MAX8662/63 toc05
BATTERY-REGULATION VOLTAGE vs. TEMPERATURE
EN_ = 0 4.195 4.190 4.185 4.180 4.175 4.170
MAX8662/63 toc06
0.5 BATTERY-LEAKAGE CURRENT (A) EN_ = 0, CEN = 1 VDC OPEN VDC = 5V
0.8 BATTERY-LEAKAGE CURRENT (A)
4.200
0.4
0.3
0.2
0.1
0 0 1 2 3 4 5 BATTERY VOLTAGE (V)
-40
-15
10
35
60
85
-40
-15
10
35
60
85
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
CHARGE CURRENT vs. BATTERY VOLTAGE (100mA USB)
MAX8662/63 toc07
CHARGE CURRENT vs. BATTERY VOLTAGE (500mA USB)
500 450 CHARGE CURRENT (mA) 400 350 300 250 200 150 100 50 0 100 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 BATTERY VOLTAGE (V) VDC = 5V RISET = 3k PEN1 = 0 PEN2 = 1 VBAT RISING VBAT FALLING
MAX8662/63 toc08
CHARGE CURRENT vs. BATTERY VOLTAGE (AC ADAPTER)
700 CHARGE CURRENT (mA) 600 500 400 300 200 VDC = 5V RISET = 3k PEN1 = PEN2 = 1 VBAT RISING VBAT FALLING
MAX8662/63 toc09
100 90 80 CHARGE CURRENT (mA) 70 60 50 40 30 20 10 0 0 1 2 3 4 5 BATTERY VOLTAGE (V) VBAT RISING VBAT FALLING VDC = 5V RISET = 3k PEN1 = PEN2 = 0
550
800
0
1
2
3
4
5
BATTERY VOLTAGE (V)
8
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5k, RISET = 3k, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 = VPEN2 = 5V, COUT1 = 2 x 10F, COUT2 = 2 x 10F, COUT3 = 0.1F, COUT4 = 4.7F, COUT5 = 1F, COUT6 = 2.2F, COUT7 = 1F, CT = 0.068F, CREF = CVL = 0.1F, RTHM = 10k, L1 = 3.3H, L2 = 4.7H, L3 = 22H, GND = PG1 = PG2 = PG3 = 0, TA = +25C, unless otherwise noted.) SYS OUTPUT VOLTAGE CHARGE CURRENT vs. AMBIENT TEMPERATURE CHARGE CURRENT vs. AMBIENT TEMPERATURE vs. INPUT VOLTAGE (LOW IC POWER DISSIPATION) (HIGH IC POWER DISSIPATION)
MAX8662/63 toc10 MAX8662/63 toc11
MAX8662/MAX8663
800 CHARGE CURRENT (mA) 700 600 500 400 300 200 100 0 -40
PEN1 = PEN2 = 1
PEN1 = PEN2 = 1 800 CHARGE CURRENT (mA) 700 600 500 400 300 200 VDC = 6.5V, VBAT = 3.1V RISET = 3k, CEN = 0, EN_ = 0 PEN1 = PEN2 = 0
5.4 5.2 5.0 VSYS (V)
VBAT = 4.0V ISYS = 0mA PEN1 = 0 PEN2 = 1 CHARGER DISABLED CHARGER ENABLED
PEN1 = 0, PEN2 = 1 VDC = 5.0V, VBAT = 4.0V RISET = 3k, CEN = 0, EN_ = 0 PEN1 = PEN2 = 0
PEN1 = 0, PEN2 = 1
4.8 4.6 4.4 4.2 4.0 3.8 3.6
100 0 35 60 85 -40
-15
10
-15
10
35
60
85
0
1
2
3
4
5
6
7
8
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
INPUT VOLTAGE (V)
SYS OUTPUT VOLTAGE vs. SYS OUTPUT CURRENT (DC DISCONNECTED)
MAX8662/63 toc13
SYS OUTPUT VOLTAGE vs. SYS OUTPUT CURRENT (500mA USB)
5.4 5.2 5.0 VSYS (V) 4.8 4.6 4.4 4.2 4.0 3.8 3.6 VDC = 5.0V VBAT = 4.0V PEN1 = 0, PEN2 = 1 CEN = 1
MAX8662/63 toc14
SYS OUTPUT VOLTAGE vs. SYS OUTPUT CURRENT (AC ADAPTER)
5.4 5.2 5.0 VSYS (V) 4.8 4.6 4.4 4.2 4.0 3.8 3.6 VDC = 5.0V VBAT = 4.0V PEN1 = PEN2 = 1 CEN = 1
MAX8662/63 toc15
5.6 5.4 5.2 5.0 VSYS (V) 4.8 4.6 4.4 4.2 4.0 3.8 3.6 0 0.5 1.0 1.5 ISYS (A) 2.0 2.5 VDC = 0V VBAT = 4.0V THE SLOPE OF THIS LINE SHOWS THAT THE BAT-TO-SYS RESISTANCE IS 49m.
5.6
5.6
3.0
0
0.5
1.0
1.5 ISYS (A)
2.0
2.5
3.0
0
0.5
1.0
1.5 ISYS (A)
2.0
2.5
3.0
USB CONNECT (ISYS = 0mA)
MAX8662/63 toc16
USB CONNECT (ISYS = 50mA)
MAX8662/63 toc17
VDC IIN VSYS VPOK VCHG IBAT
0V
5V +95mA
5V/div 200mA/div
VDC IIN VSYS VPOK VCHG IBAT
0V 5V
5V +95mA
5V/div 200mA/div 2V/div
0mA 4.0V
4.4V 5V
2V/div 5V/div
0mA 4.0V
4.4V
0V 0mA +95mA NEGATIVE BATTERY CURRENT FLOWS INTO THE BATTERY (CHARGING). 200s/div PEN1 = PEN2 = 0, CEN = 0, VBAT = 4.0V, ISYS = 0mA, EN_ = 1
0V 0V 50mA
NEGATIVE BATTERY CURRENT FLOWS INTO THE BATTERY (CHARGING).
5V/div 200mA/div
5V/div 5V/div 200mA/div -45mA
200s/div PEN1 = PEN2 = 0, CEN = 0, VBAT = 4.0V, ISYS = 50mA, EN_ = 1
_______________________________________________________________________________________
MAX8662/63 toc12
900
900
5.6
9
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5k, RISET = 3k, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 = VPEN2 = 5V, COUT1 = 2 x 10F, COUT2 = 2 x 10F, COUT3 = 0.1F, COUT4 = 4.7F, COUT5 = 1F, COUT6 = 2.2F, COUT7 = 1F, CT = 0.068F, CREF = CVL = 0.1F, RTHM = 10k, L1 = 3.3H, L2 = 4.7H, L3 = 22H, GND = PG1 = PG2 = PG3 = 0, TA = +25C, unless otherwise noted.) AC ADAPTER CONNECT (ISYS = 500mA) USB DISCONNECTED (500mA USB)
MAX8662/63 toc18 MAX8662/63 toc19
VDC IIN VSYS VPOK VCHG
0V 0mA
5V +1280mA
5V/div 1A/div
VDC IIN
5V 475mA
5V/div 500mA/div
5V 4.0V
4.4V
2V/div VSYS 5V/div 5V/div
4.4V
1V/div
0V 500mA IBAT -780mA NEGATIVE BATTERY CURRENT FLOWS INTO THE BATTERY (CHARGING). 400s/div PEN1 = PEN2 = 1, CEN = 0, VBAT = 4.0V, ISYS = 500mA, EN_ = 1 1A/div
VCHG IBAT
0V 0mA -475mA
5V/div
500mA/div
200s/div PEN1 = 0, PEN2 = 1, CEN = 0, VBAT = 4.0V, ISYS = 0mA
CHARGER ENABLE (ISYS = 0mA)
MAX8662/63 toc20
OUT1 REGULATOR EFFICIENCY vs. LOAD CURRENT
5V/div 90 80 70 60 50 40 30 20 10 0 PWM = 0 PWM = 1 VOUT1 = 3.3V 0.1 1 10 100 1000 10,000 VBAT = 4.2V VBAT = 4.2V VBAT = 3.6V VBAT = 3.6V
MAX8662/63 toc21
100 OUT1 REGULATOR EFFICIENCY (%)
VCEN IIN VSYS VCHG
2.8V 0mA 5V
0V 475mA
1A/div
4.4V
2V/div 5V/div
0V 0mA
IBAT
-475mA
500mA/div
200s/div PEN1 = 0, PEN2 = 1, VBAT = 4.0V, ISYS = 0mA, EN_ = 1
LOAD CURRENT (mA)
OUT1 REGULATOR LOAD REGULATION
MAX8662/63 toc22
OUT1 REGULATOR LINE REGULATION
MAX8662/63 toc23
OUT1 VOLTAGE vs. TEMPERATURE
VBAT = 4.0V RLOAD = 330 3.306 OUTPUT VOLTAGE (V)
MAX8662/63 toc24
3.40
3.4 3.3 3.2 OUTPUT VOLTAGE (V) 3.1 3.0 2.9 2.8 2.7 2.6 RLOAD = 330
3.310
3.36 OUTPUT VOLTAGE (V) VBAT = 4.2V 3.32
3.302
3.28
VBAT = 3.6V
3.298
3.24
3.294
3.20 0.1 1 10 100 1000 10,000 LOAD CURRENT (mA)
2.5 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 VSYS (V)
3.290 -40 -15 10 35 60 85 AMBIENT TEMPERATURE (C)
10
______________________________________________________________________________________
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5k, RISET = 3k, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 = VPEN2 = 5V, COUT1 = 2 x 10F, COUT2 = 2 x 10F, COUT3 = 0.1F, COUT4 = 4.7F, COUT5 = 1F, COUT6 = 2.2F, COUT7 = 1F, CT = 0.068F, CREF = CVL = 0.1F, RTHM = 10k, L1 = 3.3H, L2 = 4.7H, L3 = 22H, GND = PG1 = PG2 = PG3 = 0, TA = +25C, unless otherwise noted.)
OUT1 REGULATOR LIGHT-LOAD SWITCHING WAVEFORMS
MAX8662/63 toc25
MAX8662/MAX8663
OUT1 REGULATOR HEAVY-LOAD SWITCHING WAVEFORMS
MAX8662/63 toc26
VBAT = 4.0V IOUT1 = 10mA VOUT1 AC-COUPLED VLX 50mV/div
VOUT1 AC-COUPLED
10mV/div
2V/div
VLX
2V/div
IL PWM = 0 20s/div
200mA/div
IL VBAT = 4.2V IOUT1 = 1200mA 1s/div
500mA/div
OUT1 REGULATOR LOADTRANSIENT RESPONSE
MAX8662/63 toc27
OUT1 REGULATOR LINETRANSIENT RESPONSE
MAX8662/63 toc28
VLX
5V/div VSYS 4V IOUT1 = 10mA PWM = 0
5V 1V/div
IOUT1 IL VBAT = 4.0V IOUT1 = 10mA TO 1200mA TO 10mA PWM = 0
1A/div 1A/div
VOUT1 50mV/div 5V/div
VLX
VOUT1
100mV/div
IL
200mA/div
40s/div
100s/div
OUT1 ENABLE AND DISABLE RESPONSE
MAX8662/63 toc29
OUT2 REGULATOR EFFICIENCY vs. LOAD CURRENT
MAX8662/63 toc30
OUT2 REGULATOR LOAD REGULATION
VBAT = 4.2V 1.31 OUTPUT VOLTAGE (V) 1.30 1.29 1.28 1.27 1.26 0.1 1 10 100 1000 10,000 LOAD CURRENT (mA) VBAT = 3.6V
MAX8662/63 toc31
100 OUT2 REGULATOR EFFICIENCY (%) 90 80 70 60 50 40 30 20 10 0 0.1 1 10 PWM = 0 PWM = 1 VOUT1 = 3.3V 100 VBAT = 3.6V VBAT = 4.2V VBAT = 4.2V VBAT = 3.6V
1.32
VEN1 2V/div
VOUT1
2V/div
IOUT1 = 10mA 1ms/div
1000
LOAD CURRENT (mA)
______________________________________________________________________________________
11
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5k, RISET = 3k, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 = VPEN2 = 5V, COUT1 = 2 x 10F, COUT2 = 2 x 10F, COUT3 = 0.1F, COUT4 = 4.7F, COUT5 = 1F, COUT6 = 2.2F, COUT7 = 1F, CT = 0.068F, CREF = CVL = 0.1F, RTHM = 10k, L1 = 3.3H, L2 = 4.7H, L3 = 22H, GND = PG1 = PG2 = PG3 = 0, TA = +25C, unless otherwise noted.)
OUT2 REGULATOR LINE REGULATION
MAX8662/63 toc32
OUT2 VOLTAGE vs. TEMPERATURE
VBAT = 4.0V RLOAD = 130
MAX8662/63 toc33
1.310
RLOAD = 130
1.3050
1.308 OUTPUT VOLTAGE (V)
1.306
OUTPUT VOLTAGE (V) 3.1 3.5 3.9 4.3 4.7 5.1
1.3045
1.3040
1.304
1.302
1.3035
1.300 2.7 5.5 VSYS (V)
1.3030 -40 -15 10 35 60 85 AMBIENT TEMPERATURE (C)
OUT2 REGULATOR LIGHT-LOAD SWITCHING WAVEFORMS
MAX8662/63 toc34
OUT2 REGULATOR HEAVY-LOAD SWITCHING WAVEFORMS
MAX8662/63 toc35
VOUT2 AC-COUPLED
VBAT = 4.0V IOUT2 = 10mA
PWM = 0 20mV/div VOUT2 AC-COUPLED 10mV/div
VLX
2V/div
VL
2V/div
IL IL 100mA/div VBAT = 4.0V IOUT2 = 900mA 10s/div 1s/div
500mA/div
OUT2 REGULATOR LOADTRANSIENT RESPONSE
MAX8662/63 toc36
OUT2 REGULATOR LINETRANSIENT RESPONSE
MAX8662/63 toc37
5V VLX 5V/div VSYS 4V IOUT1 = 10mA PWM = 0 1V/div
IOUT2
1A/div
VOUT1
20mV/div
IL
500mA/div
VLX
5V/div
VOUT2 AC-COUPLED
50mV/div VBAT = 4.0V IOUT2 = 10mA TO 900mA TO 10mA 40s/div PWM = 0
IL
200mA/div
100s/div
12
______________________________________________________________________________________
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5k, RISET = 3k, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 = VPEN2 = 5V, COUT1 = 2 x 10F, COUT2 = 2 x 10F, COUT3 = 0.1F, COUT4 = 4.7F, COUT5 = 1F, COUT6 = 2.2F, COUT7 = 1F, CT = 0.068F, CREF = CVL = 0.1F, RTHM = 10k, L1 = 3.3H, L2 = 4.7H, L3 = 22H, GND = PG1 = PG2 = PG3 = 0, TA = +25C, unless otherwise noted.) LED CURRENT OUT2 ENABLE AND DISABLE RESPONSE LED CURRENT vs. BRT VOLTAGE vs. PWM DIMMING DUTY CYCLE
MAX8662/63 toc38 MAX8662/63 toc39
MAX8662/MAX8663
4.5 VEN2 0V 4.0 LED CURRENT (mA) 2V/div 3.5 3.0 2.5 2.0 1.5 1.0 IOUT2 = 10mA 1s/div 0.5 0 0
VBAT = 3.6V VBRT = 0.25V f = 1kHz
VBAT = 3.6V
25 LED CURRENT (mA) 20 15 10 5 0
VOUT2
0V
1V/div
10
20 30 40 50
60 70 80 90 100
0
0.3
0.6
0.9
1.2
1.5
DUTY CYCLE (%)
BRT VOLTAGE (V)
OUT3 SWITCHING WAVEFORMS
MAX8662/63 toc41
OUT3 ENABLE AND DISABLE RESPONSE
MAX8662/63 toc42
OUT3 REGULATOR EFFICIENCY vs. LOAD CURRENT
90 80 70 60 50 40 30 20 10 0 VSYS = 3.6V VSYS = 5.5V VSYS = 4.2V
MAX8662/63 toc43
100 OUT2 REGULATOR EFFICIENCY (%)
IL
100mA/div VEN3 0V 2V/div
VLX
10V/div VOUT3 0V 10V/div
VOUT3 AC-COUPLED IOUT3 = 1mA 1s/div
200mV/div
40ms/div
0.1
1
10
100
LOAD CURRENT (mA)
OUT4 REGULATOR LOAD REGULATION
MAX8662/63 toc44
OUT4 REGULATOR LINE REGULATION
MAX8662/63 toc45
OUT4 VOLTAGE vs. TEMPERATURE
VBAT = 4.0V RLOAD = 330
MAX8662/63 toc46
3.315 3.310 OUTPUT VOLTAGE (V) 3.305 VIN = 3.6V 3.300 3.295 3.290 3.285 3.280 0 100 200 300 400 VIN = 5.5V
3.4
3.315
RLOAD = 330
3.0 OUTPUT VOLTAGE (V)
3.313 OUTPUT VOLTAGE (V)
2.6
3.311
2.2
3.309
1.8
3.307
1.4 500 1 2 3 4 5 6 LOAD CURRENT (mA) VIN_OUT4 (V)
3.305 -40 -15 10 35 60 85 AMBIENT TEMPERATURE (C)
_____________________________________________________________________________________
13
MAX8662/63 toc40
5.0
30
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5k, RISET = 3k, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 = VPEN2 = 5V, COUT1 = 2 x 10F, COUT2 = 2 x 10F, COUT3 = 0.1F, COUT4 = 4.7F, COUT5 = 1F, COUT6 = 2.2F, COUT7 = 1F, CT = 0.068F, CREF = CVL = 0.1F, RTHM = 10k, L1 = 3.3H, L2 = 4.7H, L3 = 22H, GND = PG1 = PG2 = PG3 = 0, TA = +25C, unless otherwise noted.) OUT4 REGULATOR LINEOUT4 REGULATOR LOADTRANSIENT RESPONSE TRANSIENT RESPONSE
MAX8662/63 toc47 MAX8662/63 toc48
5V IOUT4 VIN45 500mA/div 3.6V 2V/div
VOUT4 AC-COUPLED VBAT = 4.0V IOUT4 = 10mA TO 500mA TO 10mA 40s/div
50mV/div
VOUT4 AC-COUPLED
20mV/div
IOUT4 = 10mA 100s/div
OUT4 ENABLE AND DISABLE RESPONSE
MAX8662/63 toc49
OUT4 REGULATOR DROPOUT VOLTAGE vs. LOAD CURRENT
90 DROPOUT VOLTAGE (mV) THE SLOPE OF THIS LINE SHOWS THAT THE DROPOUT RESISTANCE OF AN AVERAGE PART AND BOARD COMBINATION IS 181m.
MAX8662/63 toc50
OUT5 REGULATOR LOAD REGULATION
MAX8662/63 toc51
100
3.310
0V
70 60 50 40 30 20 10 0
OUTPUT VOLTAGE (V)
VEN4
2V/div
80
3.308 VIN = 3.6V 3.306
VOUT4 0V 2V/div
3.304
VIN = 5.5V
3.302
3.300 0 100 200 300 400 500 0 30 60 90 120 150 LOAD CURRENT (mA) LOAD CURRENT (mA)
200s/div
OUT5 REGULATOR LINE REGULATION
MAX8662/63 toc52
OUT5 VOLTAGE vs. TEMPERATURE
VBAT = 4.0V RLOAD = 330
MAX8662/63 toc53
3.4
RLOAD = 330
3.310 3.309 OUTPUT VOLTAGE (V) 3.308 3.307 3.306 3.305 3.304
3.0 OUTPUT VOLTAGE (V)
2.6
2.2
1.8
1.4 1 2 3 4 5 6 VIN_OUT5 (V)
-40
-15
10
35
60
85
AMBIENT TEMPERATURE (C)
14
______________________________________________________________________________________
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5k, RISET = 3k, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 = VPEN2 = 5V, COUT1 = 2 x 10F, COUT2 = 2 x 10F, COUT3 = 0.1F, COUT4 = 4.7F, COUT5 = 1F, COUT6 = 2.2F, COUT7 = 1F, CT = 0.068F, CREF = CVL = 0.1F, RTHM = 10k, L1 = 3.3H, L2 = 4.7H, L3 = 22H, GND = PG1 = PG2 = PG3 = 0, TA = +25C, unless otherwise noted.)
OUT5 REGULATOR LOADTRANSIENT RESPONSE
MAX8662/63 toc54
MAX8662/MAX8663
OUT5 REGULATOR LINETRANSIENT RESPONSE
MAX8662/63 toc55
VIN45 IOUT5 100mA/div
5V 3.6V 2V/div
VOUT5 AC-COUPLED
50mV/div
VOUT5 AC-COUPLED
20mV/div
IOUT5 = 10mA VBAT = 4.0V IOUT5 = 10mA TO 150mA TO 10mA 40s/div 100s/div
OUT5 ENABLE AND DISABLE RESPONSE
MAX8662/63 toc56
OUT5 REGULATOR DROPOUT VOLTAGE vs. LOAD CURRENT
THE SLOPE OF THIS LINE SHOWS THAT THE DROPOUT RESISTANCE OF AN AVERAGE PART AND BOARD COMBINATION IS 384m.
MAX8662/63 toc57
70 60
0V
2V/div
DROPOUT VOLTAGE (V)
VEN5
50 40 30 20 10 0
VOUT5
0V
2V/div
200s/div
0
30
60
90
120
150
IOUT (mA)
OUT6 REGULATOR LOAD REGULATION
MAX8662/63 toc58
OUT6 REGULATOR LINE REGULATION
MAX8662/63 toc59
OUT6 VOLTAGE vs. TEMPERATURE
VBAT = 4.0V RLOAD = 330
MAX8662/63 toc60
3.310
3.4 3.2 3.0 OUTPUT VOLTAGE (V) 2.8 2.6 2.4 2.2 2.0 1.8 1.6
RLOAD = 330
3.309
3.306 OUTPUT VOLTAGE (V)
3.302
VIN = 5.5V
OUTPUT VOLTAGE (V) 1 6
3.307
3.305
3.298 VIN = 3.6V 3.294
3.303
3.290 0 50 100 150 200 250 300 LOAD CURRENT (mA)
1.4 2 3 4 5 VIN_OUT6 (V)
3.301 -40 -15 10 35 60 85 AMBIENT TEMPERATURE (C)
______________________________________________________________________________________
15
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5k, RISET = 3k, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 = VPEN2 = 5V, COUT1 = 2 x 10F, COUT2 = 2 x 10F, COUT3 = 0.1F, COUT4 = 4.7F, COUT5 = 1F, COUT6 = 2.2F, COUT7 = 1F, CT = 0.068F, CREF = CVL = 0.1F, RTHM = 10k, L1 = 3.3H, L2 = 4.7H, L3 = 22H, GND = PG1 = PG2 = PG3 = 0, TA = +25C, unless otherwise noted.) OUT6 REGULATOR LINEOUT6 REGULATOR LOADTRANSIENT RESPONSE TRANSIENT RESPONSE
MAX8662/63 toc61 MAX8662/63 toc62
5V IOUT6 VIN67 200mA/div 3.6V 2V/div
VOUT6 AC-COUPLED
50mV/div
VOUT6 AC-COUPLED
20mV/div
VBAT = 4.0V IOUT6 = 10mA TO 300mA TO 10mA 40s/div 100s/div
IOUT6 = 10mA
OUT6 ENABLE AND DISABLE RESPONSE
MAX8662/63 toc63
OUT6 REGULATOR DROPOUT VOLTAGE vs. LOAD CURRENT
70 DROPOUT VOLTAGE (mV) THE SLOPE OF THIS LINE SHOWS THAT THE DROPOUT RESISTANCE OF AN AVERAGE PART AND BOARD COMBINATION IS 238m.
MAX8662/63 toc64
80
VEN6
0V
2V/div
60 50 40 30 20 10 0
VOUT6
0V
2V/div
200s/div
0
50
100
150 IOUT (mA)
200
250
300
OUT7 REGULATOR LOAD REGULATION
MAX8662/63 toc65
OUT7 REGULATOR LINE REGULATION
MAX8662/63 toc66
OUT7 VOLTAGE vs. TEMPERATURE
VBAT = 4.0V RLOAD = 330
MAX8662/63 toc67
3.304
3.4 3.2 3.0 OUTPUT VOLTAGE (V) 2.8 2.6 2.4 2.2 2.0 1.8 1.6
RLOAD = 330
3.303
3.302 OUTPUT VOLTAGE (V)
3.302 OUTPUT VOLTAGE (V)
3.300
VIN = 5.5V
3.301
3.298 VIN = 3.6V 3.296
3.300
3.299
3.294 0 30 60 90 120 150 LOAD CURRENT (mA)
1.4 1 2 3 4 5 6 VIN_OUT7 (V)
3.298 -40 -15 10 35 60 85 AMBIENT TEMPERATURE (C)
16
______________________________________________________________________________________
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5k, RISET = 3k, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 = VPEN2 = 5V, COUT1 = 2 x 10F, COUT2 = 2 x 10F, COUT3 = 0.1F, COUT4 = 4.7F, COUT5 = 1F, COUT6 = 2.2F, COUT7 = 1F, CT = 0.068F, CREF = CVL = 0.1F, RTHM = 10k, L1 = 3.3H, L2 = 4.7H, L3 = 22H, GND = PG1 = PG2 = PG3 = 0, TA = +25C, unless otherwise noted.) OUT7 REGULATOR LOADOUT7 REGULATOR LINETRANSIENT RESPONSE TRANSIENT RESPONSE
MAX8662/63 toc68 MAX8662/63 toc69
MAX8662/MAX8663
5V IOUT7 VIN67 100mA/div 3.6V 2V/div
VOUT7 AC-COUPLED
50mV/div VOUT7 AC-COUPLED VBAT = 4.0V IOUT7 = 10mA TO 150mA TO 10mA 40s/div 100s/div IOUT7 = 10mA
20mV/div
OUT7 ENABLE AND DISABLE RESPONSE
MAX8662/63 toc70
OUT7 REGULATOR DROPOUT VOLTAGE vs. LOAD CURRENT
THE SLOPE OF THIS LINE SHOWS THAT THE DROPOUT RESISTANCE OF AN AVERAGE PART AND BOARD COMBINATION IS 391m.
MAX8662/63 toc71
VL REGULATOR LOAD REGULATION
MAX8662/63 toc72
70 60
3.31 3.30 OUTPUT VOLTAGE (V) 3.29 3.28 3.27 3.26 VIN = 4.35V 3.25 3.24 VIN = 5.5V
VEN7
DROPOUT VOLTAGE (V)
0V
2V/div
50 40 30 20 10 0
VOUT7
0V
2V/div
200s/div
0
25
50
75 IOUT (mA)
100
125
150
0
1
2
3
4
5
6
7
8
9
10
LOAD CURRENT (mA)
VL REGULATOR LINE REGULATION
MAX8662/63 toc73
OPEN-DRAIN OUTPUT VOLTAGE LOW vs. SINK CURRENT
THE SLOPE OF THIS LINE SHOWS THAT THE PULLDOWN RESISTANCE IS 11. VIN = 5.0V VBAT = 4.0V
MAX8662/63 toc74
3.50 3.45 3.40 OUTPUT VOLTAGE (V) 3.35 3.30 3.25 3.20 3.15 3.10 3.05 3.00 3
RLOAD = 3.3k
0.5
OUTPUT LOW VOLTAGE (V)
0.4
0.3
0.2
0.1 PULLDOWN DEVICE HAS A 20mA STEADY-STATE RATING 0 5 10 15 20 25 30 35 40
0 4 5 VIN (V) 6 7 8
ISINK (mA)
______________________________________________________________________________________
17
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Pin Description
PIN MAX8662 1 2 MAX8663 1 2 NAME PEN1 PEN2 FUNCTION Input Limiter-Control Input 1. Used with CEN and PEN2 to set the DC current limit to 95mA, 475mA, a resistor programmable level up to 2A, or to turn off the input limiter (see Table 1). Input Limiter-Control Input 2. Used with CEN and PEN1 to set the DC current limit to 95mA, 475mA, a resistor programmable level up to 2A, or to turn off the input limiter (see Table 1). Enable Input and PWM Dimming Input for Regulator 3 White LED Boost. Drive high to enable. Drive low for more than 2ms to turn off. For PWM-controlled dimming, drive EN3 with a PWM switching input with a frequency of 1kHz to 100kHz. DC Input Source. Connect to an AC adapter or USB source. DC1 and DC2 are internally connected. System Supply Voltage. The SYS output supplies power to all regulators. With no external power, SYS1 and SYS2 connect to BAT through an internal 40m switch. When a valid voltage is present at DC_, SYS_ connects to DC_ but is limited to 5.3V. SYS1 and SYS2 are internally connected. Battery Connections. Connect to a single-cell Li+ battery. The battery is charged from SYS_ when a valid source is present at DC. BAT_ drives SYS_ when DC is not valid. BAT1 and BAT2 are internally connected. LED Analog Brightness Control Input. Connect BRT to a voltage from 50mV to 1.5V to set ICS from 1mA to 30mA. Connect BRT to the center of a resistor-divider connected between REF and GND to set a fixed brightness when analog dimming is not required. Charger Status Output. CHG is an open-drain nMOS that pulls low when the charger is in fast charge or prequalification modes. CHG goes high impedance when the charger is in top-off mode or disabled. Charger Enable Input. Drive CEN low to enable the charger when a valid source is connected at DC. Drive CEN high to disable charging. Drive CEN high and PEN2 low to enter USB suspend mode. Thermistor Input. Connect a 10k negative temperature coefficient (NTC) thermistor from THM to GND. Charging is suspended when the temperature is beyond the hot or cold limits. Connect THM to GND to disable the thermistor functionality. Charge Rate-Set Input. Connect a resistor from ISET to GND to set the fast-charge current from 300mA to 1.25A. The prequalification charge current and top-off threshold are set to 10% and 7.5% of fast-charge current, respectively. Charge Timer-Programming Pin. Connect a capacitor from CT to GND to set the length of time required to trigger a fault condition in fast-charge or prequalification mode and to determine the time the charger remains in top-off mode. Connect CT to GND to disable timers. Reference Voltage. Provides 1.5V output when EN3 is high. An internal discharge resistance pulls REF to 0V when EN3 is low. Ground. Low-noise ground connection. Linear Regulator 4 Output. Delivers up to 500mA at an output voltage determined by SL1 and SL2. Connect a 4.7F ceramic capacitor from OUT4 to GND. Increase the value to 10F if VOUT4 < 1.5V.
3
--
EN3 DC1, DC2 SYS1, SYS2
4, 5
3, 4
6, 7
5, 6
8, 9
7, 8
BAT1, BAT2
10
--
BRT
11
9
CHG
12
10
CEN
13
11
THM
14
12
ISET
15
13
CT
16 17 18
-- 14 15
REF GND OUT4
18
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
Pin Description (continued)
PIN MAX8662 19 MAX8663 16 NAME IN45 FUNCTION Input Supply for Linear Regulators 4 and 5. Connect IN45 to a supply voltage between 1.7V and VSYS. Connect at least a 1F ceramic capacitor from IN45 to GND. Linear Regulator 5 Output. Delivers up to 150mA at an output voltage determined by SL1 and SL2. Connect a 1F ceramic capacitor from OUT5 to GND. Increase the value to 2.2F if VOUT5 < 1.5V. Enable Input for Linear Regulator 4. Drive high to enable. Enable Input for Linear Regulator 5. Drive high to enable. PWM/Skip-Mode Selector. Drive PWM high to force step-down regulators 1 and 2 to operate in 1MHz forced-PWM mode. Drive PWM low, or connect to GND to allow regulators 1 and 2 to enter skip mode at light loads. Feedback Input for Buck Regulator 1. Connect FB1 to the center of a resistor-divider connected between OUT1 and GND to set the output voltage between 0.98V and 3.3V. Enable Input for Buck Regulator 1. Drive high to enable. Power Ground for Buck Regulator 1. GND, PG1, PG2, and PG3 must be connected together externally. Buck Regulator 1 Inductor Connection Node. Connect an inductor from LX1 to the output of regulator 1. Power Input for Buck Regulator 1. Connect PV1 to SYS and decouple with a 10F or greater lowESR capacitor to GND. PV1, PV2, and SYS must be connected together externally. LED Boost Overvoltage Input. Connect a resistor from OVP to the boost output to set the maximum output voltage and to initiate soft-start when EN3 goes high. An internal 20A pulldown current from OVP to GND determines the maximum boost voltage. The internal current is disconnected when EN3 is low. OVP is diode clamped to SYS_. LED Current Source. Sinks from 1mA to 30mA depending on the voltage at BRT and the PWM signal at EN3. Driving EN3 low for more than 2ms turns off the current source. VCS is regulated to 0.32V. Compensation Input for LED Boost Regulator 3. See the Boost Converter with White LED Driver (OUT3, MAX8662 Only) section. Feedback Input for Buck Regulator 2. Connect FB2 to the center of a resistor-divider connected between OUT2 and GND to set the output voltage between 0.98V and 3.3V. Power Input for Buck Regulator 2. Connect PV2 to SYS and decouple with a 10F or greater low-ESR capacitor to GND. PV1, PV2, and SYS must be connected together externally. Buck Regulator 2 Inductor Connection Node. Connect an inductor from LX2 to the output of regulator 2. Power Ground for Buck Regulator 2. GND, PG1, PG2, and PG3 must be connected together externally. Enable Input for Buck Regulator 2. Drive high to enable. Enable Input for Linear Regulator 6. Drive high to enable. Enable Input for Linear Regulator 7. Drive high to enable. Boost Regulator 3 Inductor Connection Node. Connect an inductor from LX3 to SYS_.
MAX8662/MAX8663
20 21 22 23
17 18 19 20
OUT5 EN4 EN5 PWM
24 25 26 27 28
21 22 23 24 25
FB1 EN1 PG1 LX1 PV1
29
--
OVP
30
--
CS
31 32
-- 26
CC3 FB2
33
27
PV2
34 35 36 37 38 39
28 29 30 31 32 --
LX2 PG2 EN2 EN6 EN7 LX3
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19
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Pin Description (continued)
PIN MAX8662 40 MAX8663 -- NAME PG3 FUNCTION Power Ground for Boost Regulator 3. GND, PG1, PG2, and PG3 must be connected together externally. Linear Regulator 6 Output. Delivers up to 300mA at an output voltage determined by SL1 and SL2. Connect a 2.2F ceramic capacitor from OUT6 to GND. Increase the value to 4.7F if VOUT6 < 1.5V. Input Supply for Linear Regulators 6 and 7. Connect IN67 to a supply voltage of 1.7V to VSYS. Connect at least a 1F ceramic capacitor from IN67 to GND. Linear Regulator 7 Output. Delivers up to 150mA at an output voltage determined by SL1 and SL2. Connect a 1F ceramic capacitor from OUT7 to GND. Increase the value to 2.2F if VOUT7 < 1.5V. Input Limiter and Charger Logic Supply. Provides 3.3V when a valid input voltage is present at DC. Connect a 0.1F capacitor from VL to GND. VL is capable of providing up to 10mA to an external load when DC is valid. Output-Voltage Select Inputs 1 and 2 for Linear Regulators. Leave disconnected, or connect to GND or SYS to set to one of three states. SL1 and SL2 set the output voltage of OUT4, OUT5, OUT6, and OUT7 to one of nine combinations. See Table 2. Input Current-Limit Set Input. Connect a resistor (RPSET) from PSET to ground to program the DC input current limit from 500mA to 2A. Power-Ok Output. POK is an open-drain nMOS output that pulls low when a valid input is detected at DC. This output is not affected by the states of PEN1, PEN2, or CEN. Exposed Paddle. Connect the exposed paddle to ground. Connecting the exposed paddle to ground does not remove the requirement for proper ground connections to GND, PG1, PG2, and PG3. The exposed paddle is attached with epoxy to the substrate of the die, making it an excellent path to remove heat from the IC.
41
33
OUT6
42
34
IN67
43
35
OUT7
44 45 46 47 48
36 37 38 39 40
VL SL1 SL2 PSET POK
--
--
EP
20
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
INPUT FROM AC ADAPTER/USB 4.1V TO 8V C1 VLOGIC R1 POK GND INPUTVOLTAGE MONITOR DC1 DC2
+ -
SYS1 SYS SYS2 C10
INPUT-TO-SYS CURRENTLIMITING SWITCH
+ 100mV BAT1 BAT2 C11 R6 BATTERY THERMISTOR R7 CHG OK TIMEOUT DONE 500mA ADAPTER OFF C12 R8 R9 CHARGING 100mA USB ON MAIN BATTERY
VL C2
3.3V
BATTERY-TO-SYS SWITCH (ALLOWS BAT AND DC TO SUPPLY CURRENT TO SYS) INPUT LIMITER AND THERMAL PROTECTION BATTERY CHARGER
THM
VLOGIC
SYS C4 OUT1 0.98V TO 3.3V AT 1.2A C5 MAIN R2 R3 L1
PV1
PEN2 LX1 MAIN STEP-DOWN REGULATOR PG1 FB1 PEN1 CEN CT PSET
ON OFF PWM SKIP SYS C6 OUT2 0.98V TO 3.3V AT 0.9A C7 CORE R4 R5 L2
EN1
MAX8662 MAX8663
ISET
PWM
LX3 L3 D1 PG3 C14 C13
SYS
PV2
OUT3 AT 30mA D2 D3
LX2 CORE STEP-DOWN REGULATOR PG2 FB2 CS BRT ANALOG DIMMING (0 TO 1.5V) PWM BRIGHTNESS CONTROL AND ENABLE C3 OUT4 IN45 EN4 OUT5 EN5 ON OFF OUT6 EN6 ON OFF OUT7 EN7 ON OFF C19 C18 C17 ON OFF C16 STEP-UP LED DRIVER OVP CC3 C15 R10
D4 ONLY AVAILABLE D5 FOR THE MAX8662 D6 D7 D8 D9 TO SYS
ON OFF
EN2 1.5V
EN3 REF
OUT4 500mA
SYS C8
OUT5 150mA
TRI-STATE MODE INPUTS; SEE TABLE 2
{
C9
SL1 SL2
LDO OUTPUTVOLTAGE SETTING
OUT6 300mA
SYS
IN67
OUT7 150mA
EP
Figure 1. Block Diagram and Application Circuit
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Detailed Description
The MAX8662/MAX8663 highly integrated PMICs are designed for use in smart cellular phones, PDAs, Internet appliances, and other portable devices. They integrate two synchronous buck regulators, a boost regulator driving two to seven white LEDs (MAX8662 only), four low dropout (LDO) linear regulators, and a linear charger for a single-cell Li+ battery. Figure 1 is the block diagram and application circuit. SPS circuitry offers flexible power distribution between an AC adapter or USB source, battery, and system load, and makes the best use of available power from the AC adapter/USB input. The battery is charged with any available power not used by the system load. If a system load peak exceeds the current limit, supplemental current is taken from the battery. Thermal limiting prevents overheating by reducing power drawn from the input source. Two step-down DC-DC converters achieve excellent light-load efficiency and have on-chip soft-start circuitry; 1MHz switching frequency allows for small external components. Four LDO linear regulators feature low quiescent current and operate from inputs as low as 1.7V. This allows the LDOs to operate from the stepdown output voltage to improve efficiency. The white LED driver features easy adjustment of LED brightness and open-LED overvoltage protection. A 1-cell Li+ charger has programmable charge current up to 1.25A and a charge timer.
AC ADAPTER OR USB INPUT DC Q1 INPUT-TO-SYS SWITCH SYS
SYSTEM LOAD
Q2 BATTERY-TO-SYS SWITCH (DISCHARGE PATH)
Q3 (CHARGE PATH)
BAT
BATTERY
GND
MAX8662 MAX8663
THM RTHM
Figure 2. Smart Power Selector Block Diagram
Input Limiter
All regulated outputs (OUT1-OUT7) derive their power from the SYS output. With an AC adapter or USB source connected at DC, the input limiter distributes power from the external power source to the system load and battery charger. In addition to the input limiter's primary function of passing the DC power source to the system and charger loads at SYS, it performs several additional functions to optimize use of available power: * Input Voltage Limiting: If the voltage at DC rises, SYS limits to 5.3V, preventing an overvoltage of the system load. A DC voltage greater than 6.9V is considered invalid and the input limiter disconnects the DC input entirely. The withstand voltage at DC is guaranteed to be at least 9V. A DC input is also invalid if it is less than BAT, or less than the DC undervoltage threshold of 3.5V (falling). With an invalid DC input voltage, SYS connects to BAT through a 30m switch. Input Overcurrent Protection: The current at DC is limited to prevent input overload. This current limit is automatically adjusted to match the capabilities of source, whether it is a 100mA or 500mA USB source, or an AC adapter. When the load exceeds the input current limit, SYS drops to 100mV below BAT and supplemental load current is provided by the battery.
Smart Power Selector (SPS)
SPS seamlessly distributes power between the external input, the battery, and the system load (Figure 2). The basic functions of SPS are: * With both the external power supply and battery connected: a) When the system load requirements exceed the capacity of the external power input, the battery supplies supplemental current to the load. b) When the system load requirements are less than the capacity of the external power input, the battery is charged with residual power from the input. * When the battery is connected and there is no external power input, the system is powered from the battery. When an external power input is connected and there is no battery, the system is powered from the external power input.
*
*
A thermal-limiting circuit reduces battery-charge rate and external power-source current to prevent overheating.
22
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
* Thermal Limiting: The input limiter includes a thermal-limiting circuit that reduces the current drawn from DC when the IC junction temperature increases beyond +100C in an attempt to prevent further heating. The current limit is be reduced by 5%/C for temperatures above +100C, dropping to 0mA at +120C. Due to the adaptive nature of the charging circuitry, the charger current reduces to 0mA before the system load is affected by thermal limiting. Adaptive Battery Charging: While the system is powered from DC, the charger can also draw power from SYS to charge the battery. If the charger load plus system load exceeds the current capability of the input source, an adaptive charger control loop reduces charge current to prevent the SYS voltage from collapsing. Maintaining a higher SYS voltage improves efficiency and reduces power dissipation in the input limiter by running the switching regulators at lower current.
DC
Figure 3 shows the SYS voltage and its relationship to DC and BAT under three conditions: a) Charger is off and SYS is driven from DC. b) Charger is on and adaptive charger control is limiting charge current. c) The load at SYS is greater than the available input current. The adaptive battery-charger circuit reduces charging current when the SYS voltage drops 550mV below DC. For example, if DC is at 5V, the charge current reduces to prevent SYS from dropping below 4.45V. When DC is greater than 5.55V, the adaptive charging circuitry reduces charging current when SYS drops 300mV below the 5.3V SYS regulation point (5.0V). Finally, the circuit prevents itself from pulling SYS down to within 100mV of BAT.
MAX8662/MAX8663
*
INPUT: 500mA USB CHARGER: RISET = 4 (750mA)
SYS (CHARGER OFF) SYS (CHARGER ON)
5.3V 5.0V I(SYS) x 150mA 550mV
I(SYS) x 30m BAT SYS (SYS OVERLOAD) 4.0V 3.9V 100mV 100mV
475mA BAT CHARGE CURRENT (CHARGE ON)
0mA
Figure 3. SYS Voltage and Charge Current vs. DC and BAT Voltage
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23
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
DC Input Current-Limit Selection (PEN1/PEN2)
The input current limit can be set to a variety of values as shown in Table 1. When the PEN1 input is low, a USB source is expected at DC and the current limit is set to either 95mA or 475mA by PEN2. When PEN1 is high, an AC adapter is expected at DC and the current limit is set based on a programming resistor at PSET. The DC input current limit is calculated from: IDC_LIM = 2000 x (1.5 / RPSET) An exception is when the battery charger is disabled (CEN high) with PEN2 low, where the MAX8662/ MAX8663 enter USB suspend mode.
Power-OK Output (POK)
POK is an active-low open-drain output indicating DC status. When the voltage at DC is between the undervoltage and the overvoltage thresholds, and is greater than the BAT voltage, POK pulls low to indicate that input power is OK. Otherwise, POK is high impedance. POK is not affected by the states of PEN1, PEN2, or CEN. POK remains active in thermal overload.
Battery Charger
The battery charger state diagram is illustrated in Figure 4. With a valid AC adapter/USB voltage present, the battery charger initiates a charge cycle when the charger
Table 1. DC Input Current and Charger Current-Limit Select
CEN 0 0 0 1 1 1 PEN1 0 0 1 X* 0 1 PEN2 0 1 X* 0 1 1 DC INPUT CURRENT LIMIT 95mA 475mA 2000(1.5V / RPSET) Off 475mA 2000(1.5V / RPSET) EXPECTED INPUT TYPE 100mA USB 500mA USB AC adapter USB suspend 500mA USB AC adapter CHARGER CURRENT LIMIT** 1556(1.5V / RISET) 1556(1.5V / RISET) 1556(1.5V / RISET) Off Off Off
*X = Don't care.
**The maximum charge will not exceed the DC Input current.
CEN = 1 OR REMOVE AND RECONNECT AC ADAPTER/USB
CHARGER OFF CHG = HIGH-Z IBAT = 0mA
ANY STATE TOGGLE CEN OR REMOVE AND RECONNECT AC ADAPTER/USB
CEN = 0 SET TIMER = 0 PREQUALIFICATION CHG = 0V IBAT = ICHG-MAX / 10 VBAT < 2.88V SET TIMER = 0 VBAT < 3V SET TIMER = 0 TIMER > tFST-CHG (TIMER SUSPENDED IF IBAT < ICHG-MAX x 20% WHILE VBAT < 4.2V) TIMER > tPREQUAL
FAST CHARGE CHG = 0V IBAT = ICHG-MAX ANY CHARGING STATE THERMISTOR TEMPERATURE OK TIMER = RESUMED IBAT > ICHG-MAX x 12% SET TIMER = 0 TOP - OFF CHG = HIGH - Z IBAT < ICHG-MAX x 7.5% AND VBAT = 4.2V TIMER = tTOP-OFF DONE CHG = HIGH-Z IBAT = 0mA VBAT = < 4.1V SET TIMER = 0
FAULT POK = 0V CHG = BLINK AT 1Hz IBAT = 0mA
THERMISTOR TOO HOT OR TOO COLD TIMER = RESUMED
TEMPERATURE SUSPEND IBAT = 0mA CHG = PREVIOUS STATE
Figure 4. Charger State Diagram
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
is enabled. It first detects the battery voltage. If the battery voltage is less than the BAT prequalification threshold (3.0V), the charger enters prequalification mode in which the battery charges at 10% of the maximum fastcharge current. This slow charge ensures that the battery is not damaged by fast-charge current while deeply discharged. Once the battery voltage rises to 3.0V, the charger transitions to fast-charge mode and applies the maximum charge current. As charging continues, the battery voltage rises until it reaches the battery regulation voltage (4.2V) where charge current starts tapering down. When charge current decreases to 7.5% of fast-charge current, the charger enters topoff mode. Top-off charging continues for 30min, then all charging stops. If the battery voltage subsequently drops below the 4.1V recharge threshold, charging restarts and the timers reset.
MAX8662/MAX8663
MONITORING THE BATTERY CHARGE CURRENT WITH VISET
VISET =
RISET 1556
x IBAT
ISET VOLTAGE (V)
1.5
0
DISCHARGING
Charge Current ISET adjusts the MAX8662/MAX8663 charging current to match the capacity of the battery. A resistor from ISET to ground sets the maximum fast-charge current, the charge current in prequal, and the charge-current threshold below which the battery is considered completely charged. Calculate these thresholds as follows: ICHG-MAX = 1556 x 1.5V / RISET IPRE-QUAL = 10% x ICHG-MAX ITOP-OFF = 7.5% x ICHG-MAX Determine the ICHG-MAX value by considering the characteristics of the battery, and not the capabilities of the expected AC adapter/USB charging input, the system load, or thermal limitations of the PCB. The MAX8662/ MAX8663 automatically adjust the charging algorithm to accommodate these factors. In addition to setting the charge current, ISET also provides a means to monitor battery-charge current. The output voltage of the ISET pin tracks the charge current delivered to the battery, and can be used to monitor the charge rate, as shown in Figure 5. A 1.5V output indicates the battery is being charged at the maximum set fast-charge current; 0V indicates no charging. This voltage is also used by the charger control circuitry to set and monitor the battery current. Avoid adding more than 10pF capacitance directly to the ISET pin. If filtering of the charge-current monitor is necessary, add a resistor of 100k or more between ISET and the filter capacitor to preserve charger stability.
0
1556 x (1.5V/RISET)
BATTERY-CHARGING CURRENT (A)
Figure 5. Monitoring the Battery Charge Current with ISET Output Voltage
Charge Timer As shown in Figure 3, the MAX8662/MAX8663 feature a fault timer for safe charging. If prequalification charging or fast charging does not complete within the time limits, which are programmed by the timer capacitor at CT, the charger stops charging and issues a timeout fault. Charging can be resumed by either toggling CEN or cycling the DC input voltage. The MAX8662/MAX8663 support values of CCT from 0.01F to 1F: CCT tPREQUAL = 30 min x 0.068F
tFST -CHG = 300 min x CCT 0.068F
When the charger exits fast-charge mode, CHG goes high impedance and top-off mode is entered. Top-off time is also determined by the capacitance at CT: t TOP-OFF = 300 min x CCT 0.068F
In fast-charge mode, the fault timer is suspended when the charge current is limited, by input or thermal limiting, to less than 20% of ICHG-MAX.
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25
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Connect CT to GND to disable the prequalification and fast-charge timers, allowing the battery to charge indefinitely in top-off mode, or if other system timers are to be used to control charging. a beta of 3500. The relation of thermistor resistance to temperature is defined by the following equation: RT = R25 x e T +273 - 298 where: RT = The resistance in ohms of the thermistor at temperature T in Celsius R25 = The resistance in ohms of the thermistor at +25C = The material constant of the thermistor, which typically ranges from 3000K to 5000K T = The temperature of the thermistor in C Table 2 shows temperature limits for different thermistor material constants. Some designs may prefer other trip temperatures. This can usually be accommodated by connecting a resistor in series and/or in parallel with the thermistor and/or using a thermistor with different . For example, a +45C hot threshold and 0C cold threshold can be realized by using a thermistor with a of 4250 and connecting 120k in parallel. Since the thermistor resistance near 0C is much higher than it is near +50C, a large parallel resistance lowers the cold threshold, while only slightly lowering the hot threshold. Conversely, a small series resistance raises the cold threshold, while only slightly raising the hot threshold. The charger timer pauses when the thermistor resistance goes out of range: charging stops and the timer counters hold their state. When the temperature comes back into range, charging resumes and the counters continue from where they left off. Connecting THM to GND disables the thermistor function.
1 1
Charge-Enable Input (CEN) Driving CEN high disables the battery charger. Driving CEN low enables the charger when a valid source is connected at DC. CEN does not affect the input limit current, except that driving CEN high and PEN2 low activates USB suspend mode. In many systems, there is no need for the system controller (typically a microprocessor) to disable the charger because the SPS circuitry independently manages charging and adapter/battery power hand-off. In these situations, CEN can be connected to ground. Charge Status Output (CHG) CHG is an open-drain output that indicates charger status. CHG is low when the battery charger is in prequalification or fast-charge mode. It is high impedance when the charger is done, in top-off, or disabled.
The charger faults if the charging timer expires in prequalification or fast charge. In this state, CHG pulses at 1Hz to indicate that a fault occurred.
Battery Charger Thermistor Input (THM) Battery or ambient temperature can be monitored with a negative temperature coefficient (NTC) thermistor. Charging is allowed when the thermistor temperature is within the allowable range.
The charger enters a temperature suspend state when the thermistor resistance falls below 3.97k (too hot) or rises above 28.7k (too cold). This corresponds to a 0 to +50C range when using a 10k NTC thermistor with
Table 2. Fault Temperatures for Different Thermistors
THERMISTOR (K) Resistance at +25C (k) Resistance at +50C (k) Resistance at 0C (k) Nominal Hot Trip Temperature (C) Nominal Cold Trip Temperature (C) 3000 (K) 10 4.59 25.14 55 -3 3250 (K) 10 4.30 27.15 53 -1 3500 (K) 10 4.03 29.32 50 0 3750 (K) 10 3.78 31.66 49 2 4250 (K) 10 3316 36.91 46 4.5
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
VL SWITCH OPEN WHEN CHARGER DISABLED
MAX8662 MAX8663
10k
55.71k VTHM_C = 2.4V RISING (TYP)
+
COLD 60mV HYST HOT 60mV HYST DISABLE CHARGER BAD TEMP
97.71k THM VTHM_H = 0.9V FALLING (TYP)
+
54.43k THERMAL CONNECTION ESD DIODE
-
VTHM_D = 0.1V FALLING (TYP)
ENABLE THM 60mV HYST
+
6.43k GND
GND
Figure 6. Thermistor Input
Figure 6 shows a simplified version of the THM input. Ensure that the physical size of the thermistor is such that the circuit of Figure 5 does not cause self-heating.
Step-Down DC-DC Converters (OUT1 and OUT2)
OUT1 and OUT2 are high-efficiency, 1MHz, current-mode step-down converters with adjustable output voltage. The OUT1 regulator outputs 0.98V to VIN at up to 1200mA while OUT2 outputs 0.98V to VIN at up to 900mA. OUT1 and OUT2 have individual enable inputs. When enabled, the OUT1 and OUT2 gradually ramp the output voltage over a 1.6ms soft-start time. This soft-start eliminates input inrush current spikes. OUT1 and OUT2 can operate at a 100% duty cycle, which allows the regulators to maintain regulation at the lowest possible battery voltage. The OUT1 dropout voltage is 72mV with a 600mA load and the OUT2 dropout voltage is 90mV with a 450mA load (does not include inductor resistance). During 100% duty-cycle operation, the high-side p-channel MOSFET turns on continuously, connecting the input to the output through the inductor.
Step-Down Converter Operating Modes OUT1 and OUT2 can operate in either auto-PWM mode (PWM low) or forced-PWM mode (PWM high). In autoPWM mode, OUT1 and OUT2 enter skip mode when the load current drops below a predetermined level. In skip mode, the regulator skips cycles when they are not needed, which greatly decreases quiescent current and improves efficiency at light loads. In forced-PWM mode, the converters operate with a constant 1MHz switching frequency regardless of output load. Output voltage is regulated by modulating the switching duty cycle. Forced-PWM mode is preferred for low-noise systems, where switching harmonics can occur only at multiples of the constant-switching frequency and are easily filtered; however, regulator operating current is greater and light-load efficiency is reduced. Synchronous Rectification Internal n-channel synchronous rectifiers eliminate the need for external Schottky diodes and improve efficiency. The synchronous rectifier turns on during the second half of each switching cycle. During this time, the voltage across the inductor is reversed, and the inductor current ramps down. In PWM mode, the synchronous rectifier turns off at the end of the switching cycle. In
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
skip mode, the synchronous rectifier turns off when the inductor current falls below the n-channel zero-crossing threshold or at the end of the switching cycle, whichever occurs first. For example, with ROVP = 1.2M, the OUT3 maximum voltage is set at 25.25V. The OVP circuit also provides soft-start to reduce inrush current by ramping the internal pulldown current from 0 to 20A over 1.25ms at startup. The 20A internal current is disconnected when EN3 goes low. OUT3 can also be used as a voltage-output boost by setting ROVP for the desired output voltage. When doing this, the output filter capacitor must be at least 1F, and the compensation network should be a 0.01F capacitor in series with a 10k resistor from CC3 to ground.
Setting OUT1 and OUT2 Output Voltage Select an output voltage for OUT1 between 0.98V and VIN by connecting FB1 to the center of a resistive voltage-divider between OUT1 and GND. Choose R3 (Figure 1) for a reasonable bias current in the resistive divider; choose R3 to be between 100k and 200k. Then, R2 (Figure 1) is given by: R2 = R3 ((VOUT1/VFB) - 1) where VFB = 0.98V. For OUT2, R4 and R5 are calculated using: R4 = R5 ((VOUT2/VFB) - 1) OUT1 and OUT2 Inductors 3.3H and 4.7H inductors are recommended for the OUT1 and OUT2 step-down converters. Ensure that the inductor saturation current rating exceeds the peak inductor current, and the rated maximum DC inductor current exceeds the maximum output current. For lower load currents, the inductor current rating may be reduced. For most applications, use an inductor with a current rating 1.25 times the maximum required output current. For maximum efficiency, the inductor's DC resistance should be as low as possible. See Table 3 for component examples.
Brightness Control (Voltage or PWM) LED current is set by the voltage at BRT. The VBRT range for adjusting output current from 1mA to 30mA is 50mV to 1.5V. Connecting BRT to a 1.5V reference voltage (such as REF) sets LED current to 30mA. The EN3 input can also be driven by a logic-level PWM brightness control signal, such as that supplied by a microcontroller. The allowed PWM frequency range is from 1kHz to 100kHz. A 100% duty cycle corresponds to full current set by the BRT pin. The MAX8662 digitally decodes the PWM brightness signal and eliminates PWM ripple found in more common PWM brightness controls. As a result, no external filtering is needed to prevent intensity ripple at the PWM rate.
In order to properly distinguish between a DC or PWM control signal, the MAX8662 delays turn-on from the rising edge of EN3, and turn-off from the falling edge of EN3, by 2ms. If there are no more transitions in the EN3 signal after 2ms, EN3 assumes the control signal is DC and sets LED brightness based on the DC level. If two rising edges occur within 2ms, the circuit assumes the control is PWM and sets brightness based on the duty cycle.
Boost Converter with White LED Driver (OUT3, MAX8662 Only)
The MAX8662 contains a boost converter, OUT3, which drives up to seven white LEDs in series at up to 30mA. The boost converter regulates its output voltage to maintain the bottom of the LED stack at 320mV. A 1MHz switching rate allows for a small inductor and small input and output capacitors, while also minimizing input and output ripple.
Reference Voltage REF is a 1.5V regulated output that is available to drive the BRT input when the boost converter is enabled. This voltage can be used to control LED brightness by driving BRT through a resistor-divider. Boost Overvoltage Protection (OVP) OVP limits the maximum voltage of the boost output for protection against overvoltage due to open or disconnected LEDs. An external resistor between OUT3 and OVP, with an internal 20A pulldown current from OVP to GND, sets the maximum boost output to: VBOOST_MAX = (ROVP x 20A) + 1.25V
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OUT3 Inductor For the white LED driver, OUT3, a 22H inductor is recommended for most applications. For best efficiency, the inductor's DC resistance should also be as low as possible. See Table 3 for component examples. OUT3 Compensation Capacitor A compensation capacitor from CC3 to GND ensures boost converter control stability. For white LED applications, connect a 0.22F ceramic capacitor from CC3 to ground when using 0.1F at OUT3. For OLED applications, connect a 0.01F capacitor in series with 10k from CC3 to ground, and a 1F OUT3 capacitor to improve boost output load-transient response. OUT3 Diode Selection The MAX8662 boost converter's high-switching frequency demands a high-speed rectification diode (D1)
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
for optimum efficiency. A Schottky diode is recommended due to its fast recovery time and low forwardvoltage drop. Ensure the diode's peak current rating exceeds the peak inductor current. In addition, the diode's reverse breakdown voltage must exceed VOUT3. See Table 3 for component examples.
Soft-Start/Inrush Current
The MAX8662/MAX8663 implement soft-start on many levels to control inrush current and avoid collapsing source supply voltages. The input-voltage limit and battery charger have a 1.5ms soft-start time. All regulators also implement soft-start. White LED driver soft-start is accomplished by ramping the OVP current from 0 to 20A in 1.25ms. During soft-start, the PWM controller forces 0% switching duty cycle to avoid an input current surge at turn-on.
MAX8662/MAX8663
Linear Regulators (OUT4, OUT5, OUT6, and OUT7)
The MAX8662/MAX8663 contain four low-dropout, lowquiescent current, low-operating voltage linear regulators. The maximum output currents for OUT4, OUT5, OUT6, and OUT7 are 500mA, 150mA, 300mA, and 150mA, respectively. Each regulator has its own enable input. When enabled, a linear regulator soft-starts by ramping the outputs at 10V/ms. This limits inrush current when the regulators are enabled. The LDO output voltages, OUT4, OUT5, OUT6, and OUT7 are pin programmable by SL1 and SL2 (Table 3). SL1 and SL2 are intended to be hardwired and cannot be driven by active logic. Changes to SL1 and SL2 after power-up are ignored.
Undervoltage and Overvoltage Lockout
DC UVLO When the DC voltage is below the DC undervoltage threshold (V UVLO_DC , typically 3.5V falling), the MAX8662/MAX8663 enter DC undervoltage lockout (DC UVLO). DC UVLO forces the power management circuits to a known dormant state until the DC voltage is high enough to allow the device to make accurate decisions. In DC UVLO, Q1 is open (Figure 2), the charger is disabled, POK is high-Z, and CHG is high-Z. The system load switch, Q2 (Figure 2) is closed in DC UVLO, allowing the battery to power the SYS node. All regulators are allowed to operate from the battery in DC UVLO. DC OVLO When the DC voltage is above the DC overvoltage threshold (VOVLO_DC, typically 6.9V), the MAX8662/ MAX8663 enter DC overvoltage lockout (DC OVLO). DC OVLO mode protects the MAX8662/MAX8663 and downstream circuitry from high-voltage stress up to 9V. In DC OVLO, VL is on, Q1 (Figure 2) is open, the charger is disabled, POK is high-Z, and CHG is high-Z. The system load switch Q2 (Figure 2) is closed in DC OVLO, allowing the battery to power SYS. All regulators are allowed to operate from the battery in DC UVLO.
VL Linear Regulator
VL is the output of a 3.3V linear regulator that powers the on-chip input limiter and charger control circuitry. VL is powered from DC and can provide up to 10mA when a DC source is present. Bypass VL to GND with a 0.1F capacitor.
Regulator Enable Inputs (EN_)
The OUT1-OUT7 regulators have individual enable inputs. Drive EN_ high to initiate soft-start and enable OUT_. Drive EN_ low to disable OUT_. When disabled, each regulator (OUT1-OUT7) switches in an active pulldown resistor to discharge the output.
Table 3. SL1 and SL2, Output Voltage Selection
CONNECT SL_ TO: SL1 Open circuit Ground SYS Open circuit Ground SYS Open circuit Ground SYS SL2 Open circuit Open circuit Open circuit Ground Ground Ground SYS SYS SYS OUT4 (V) 3.3 3.3 2.85 3.3 2.5 2.5 1.2 3.3 1.8 LINEAR REGULATOR OUTPUT VOLTAGES OUT5 (V) 3.3 2.85 2.85 2.85 3.3 3.3 1.8 2.85 2.5 OUT6 (V) 3.3 1.85 1.85 2.85 1.5 1.5 1.1 1.5 3.3 OUT7 (V) 3.3 1.85 1.85 1.85 1.5 1.3 1.3 1.5 2.85
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
SYS UVLO When the SYS voltage falls below the SYS undervoltage threshold (V UVLO_SYS , typically 2.4V falling), the MAX8662/MAX8663 enter SYS undervoltage lockout (SYS UVLO). SYS UVLO forces all regulators off. All regulators assume the states determined by the corresponding enable input (EN_) when the SYS voltage rises above VUVLO_SYS. Input-Limiter Thermal Limiting The MAX8662/MAX8663 reduce input-limiter current by 5%/C when its die temperature exceeds +100C. The system load (SYS) has priority over charger current, so input current is first reduced by lowering charge current. If the junction temperature still reaches +120C in spite of charge-current reduction, no current is drawn from DC, the battery supplies the entire system load, and SYS is regulated at 100mV below BAT. Note that this on-chip thermal-limiting circuitry is not related to, and operates independently from, the thermistor input. Regulator Thermal-Overload Shutdown The MAX8662/MAX8663 disable all charger, SYS, and regulator outputs (except VL) if the junction temperature rises above +165C, allowing the device to cool. When the junction temperature cools by approximately 15C, resume the state they held prior to thermal overload. Note that this on-chip thermal-protection circuitry
is not related to, and operates independently from, the thermistor input. Also note that thermal-overload shutdown is a fail-safe mechanism. Proper thermal design should ensure that the junction temperature of the MAX8662/MAX8663 never exceeds the absolute maximum rating of +150C.
Applications Information
Step-Down Converters (OUT1 and OUT2)
Capacitor Selection The input capacitor in a DC-DC converter reduces current peaks drawn from the battery or other input power source and reduces switching noise in the controller. The impedance of the input capacitor at the switching frequency should be less than the input source's output impedance so that high-frequency switching currents do not pass through the input source. The DC-DC converter output capacitor keeps output ripple small and ensures control-loop stability. The output capacitor must also have low impedance at the switching frequency. Ceramic capacitors with X5R or X7R dielectrics are highly recommended for both input and output capacitors due to their small size, low ESR, and small temperature coefficients. See Table 4 for example OUT1/OUT2 input and output capacitors and manufacturers.
Table 4. External Components List (See Figure 1) (C3)
COMPONENT C1 C2 C4, C6 C5, C7 C8, C9 C10 C11 C12 C13 C14 C15 FUNCTION Input filter capacitor VL filter capacitor Buck input bypass capacitors Step-down output filter capacitors Linear regulator input filter capacitors SYS output bypass capacitor Battery bypass capacitor Charger timing capacitor Boost input bypass capacitor Step-up output filter capacitor Step-up compensation capacitor PART 4.7F 10%, 16V X5R ceramic capacitor Murata GRM188R61C105KA93B or Taiyo Yuden EMK107 BJ105KA 0.1F 10%, 10V X5R ceramic capacitor (0402) Murata GRM 155R61A104KA01 or TDK C1005X5R1A104K 4.7F 10%, 6.3V X5R ceramic capacitors (0603) Mutara GRM188R60J475KE 2 x 10F 10%, 6.3V X5R ceramic capacitors (0805) Murata GRM219R60J106KE19 1.0F 10%, 16V X5R ceramic capacitors (0603) Murata GRM188R61C105KA93B or Taiyo Yuden EMK107 BJ105KA 10F 10%, 6.3V X5R ceramic capacitor 4.7F 10%, 6.3V X5R ceramic capacitor 0.068F 10%, 10V X5R ceramic capacitor (0402) TDK C1005X5R1A683K 1.0F 10%, 16V X5R ceramic capacitor (0603) Murata GRM188R61C105KA93B or Taiyo Yuden EMK107BJ105KA 0.1F 10%, 50V X7R ceramic capacitor (0603) Murata GRM188R71H104KA93 or Taiyo Yuden UMK107BJ104KA 0.22F 10%, 10V X5R ceramic capacitor (0402) Murata GRM155R61A224KE19
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Table 4. External Components List (See Figure 1) (C3) (continued)
COMPONENT C16 C17, C19 C18 D1 D2-D8 D9 L1 L2 FUNCTION Linear regulator output filter capacitor Linear regulator output filter capacitors Linear regulator output filter capacitor Boost rectifier Display backlighting CS clamp OUT1 step-down inductor OUT2 step-down inductor PART 4.7F 10%, 6.3V X5R ceramic capacitor (0603) Murata GRM188R60J475KE19 1.0F 10%, 6.3V X5R ceramic capacitors (0603) Murata GRM188R60J105KA01 2.2F 10%, 6.3V X5R ceramic capacitor (0603) Murata GRM185R60J225KE26 200mA, 30V Schottky diode (SOD-323) Central CMDSH2-3 30mA surface-mount white LEDs Nichia NSCW215T 100mA silicon signal diode Central CMOD4448 3.3H inductor TOKO DE2818C 1072AS-3R3M, 1.6A, 50m 4.7H inductor TOKO DE2818C 1072AS-4R7M, 1.3A, 70m 22H inductor Murata LQH32CN220K53, 250mA, 0.71 DCR (3.2mm x 2.5mm x 1.55mm) or TDK VLF3012AT-220MR33, 330mA, 0.76 DCR (2.8mm x 2.6mm x 1.2mm) 100k R3 and R5 are 200k 0.1%; R2 and R4 depend on output voltage (0.1%) Phillips NTC thermistor P/N 2322-640-63103 10k 5% at +25C 1.5k 1%, for 2A limit 3k 1%, for 777mA charging 1.2M 1%, for 25V max output
L3 R1, R7 R2-R5 R6
OUT3 step-up inductor Logic output pullup resistors Step-down feedback resistors Negative TC thermistor Input current-limit programming resistor Fast charge-current programming resistor Step-up overvoltage feedback resistor
R8 R9 R10
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Table 5. MAX8662/MAX8663 Package Thermal Characteristics
48-PIN THIN QFN (6mm x 6mm) SINGLE-LAYER PCB 2105.3mW CONTINUOUS POWER Derate 26.3mW/C above DISSIPATION +70C JA JC 38C/W 1.4C/W MULTILAYER PCB 2963.0mW Derate 37.0mW/C above +70C 27C/W 1.4C/W 40-PIN THIN QFN (5mm x 5mm) SINGLE-LAYER PCB 1777.8mW Derate 22.2mW/C above +70C 45C/W 1.7C/W MULTILAYER PCB 2857.1mW Derate 35.7mW/C above +70C 28C/W 1.7C/W
Power Dissipation
The MAX8662/MAX8663 have a thermal-limiting circuitry, as well as a shutdown feature to protect the IC from damage when the die temperature rises. To allow the maximum charging current and load current on each regulator, and to prevent thermal overload, it is important to ensure that the heat generated by the MAX8662/MAX8663 is dissipated into the PCB. The package's exposed paddle must be soldered to the PCB, with multiple vias tightly packed under the exposed paddle to ensure optimum thermal contact to the ground plane. Table 5 shows the thermal characteristics of the MAX8662/MAX8663 packages. For example, the junction-to-case thermal resistance (JC) of the MAX8663 is 2.7C/W. When properly mounted on a multilayer PCB, the junction-to-ambient thermal resistance (JA) is typically 28C/W.
Position input capacitors from DC, SYS, BAT, PV1, and PV2 to the power-ground plane as close as possible to the IC. Connect input capacitors and output capacitors from inputs of linear regulators to low-noise analog ground as close as possible to the IC. Connect the inductors, output capacitors, and feedback resistors as close to the IC as possible and keep the traces short, direct, and wide. Refer to the MAX8662/MAX8663 evaluation kit for a suitable PCB layout example.
Pin Configurations (continued)
PG2 PG1 PV2 PV1 EN2 EN1 LX2
TOP VIEW
30 29 28 27 26 25 24 23 22 21 EN6 31 EN7 32 OUT6 33 IN67 34 OUT7 35 VL 36 SL1 37 SL2 38 PSET 39 POK 40 1 PEN1 2 PEN2 3 DC1 4 DC2 5 SYS1 6 SYS2 7 BAT1 8 BAT2 9 CHG 10 CEN 20 PWM 19 EN5 18 EN4 17 OUT5 16 IN45
PCB Layout and Routing
High switching frequencies and relatively large peak currents make the PCB layout a very important aspect of design. Good design minimizes ground bounce, excessive EMI on the feedback paths, and voltage gradients in the ground plane, which can result in instability or regulation errors. A separate low-noise analog ground plane containing the reference, linear regulator, signal ground, and GND must connect to the power-ground plane at only one point to minimize the effects of power-ground currents. PGND_, DC power, and battery grounds must connect directly to the power-ground plane. Connect GND to the exposed paddle directly under the IC. Use multiple tightly spaced vias to the ground plane under the exposed paddle to help cool the IC.
MAX8663
FB2
LX1
FB1 15 OUT4 14 GND 13 CT 12 ISET 11 THM
THIN QFN (5mm x 5mm)
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
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QFN THIN.EPS
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
MAX8662/MAX8663
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QFN THIN.EPS
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Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices MAX8662/MAX8663
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
36 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products. Inc.
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